The present invention generally relates to semiconductor devices and more particularly to a semiconductor device suitable for testing and a fabrication process thereof.
With increasing integration density of semiconductor integrated circuit, the number of pins extending from the semiconductor integrated circuit is increasing. On the other hand, there is a stringent demand for compact size and reduced cost for such semiconductor integrated circuits. As a result of reduced package size and increased number of pins, the size of individual pins is decreasing particularly in terms of the width and thickness, and there is a tendency that the outer leads projecting outside a package body has a reduced rigidity.
In order to conduct a test of such a device before it is shipped to the customer, it is practiced to form a package body from two package half bodies having respective, different sizes, such that a part of the outer lead projecting from the package body is supported by one of the package half bodies. Thereby, the problem of deformation of the outer lead at the time of testing is avoided even when a probe electrode is contacted upon such a supported outer lead. When forming such a package structure, it is of course necessary to maximize the yield and reduce the fabrication cost.
FIGS. 1A and 1B show a conventional construction of semiconductor device having a package disclosed in the Japanese Laid-open Patent Publication 5-109930, wherein it will be noted that FIG. 1A shows the semiconductor device in an elevational cross sectional view, while FIG. 1B shows the same semiconductor device in a bottom view.
Referring to FIGS. 1A and 1B, the package structure of the disclosed semiconductor device is suitable for testing and includes a semiconductor chip 14 held upon a stage 13 forming a part of a lead frame 12, wherein the semiconductor chip 14 is connected electrically to inner leads 15 forming a part of the lead frame 12 by means of bonding wires 16. The semiconductor chip 14 as well as the stage 13 and the inner leads 15 are embedded in a resin package body 17, and outer leads 18 forming a part of the lead frame 12 project outside the package body 17. In the illustrated example, the outer leads 18 are bent in a downward direction to form a gull-wing structure suitable for mounting upon a printed circuit board.
In the illustrated example, the package body 17 includes an upper half-body 17a located above the level of the inner leads 15 and a lower half-body 17b located below the level of the inner leads 15, wherein the upper half-body 17a has a larger area when viewed from the downward direction with respect to the lower half-body 17b, such that each of the outer leads includes an exposed area when viewed from the downward direction and such that the exposed area is supported by the upper half-body 17a. In correspondence to the exposed area of the outer leads 18, a contact region 18a is formed for contacting with a probe electrode when conducting a test of the device as indicated in the bottom view of FIG. 1B. It is also possible to form the lower package half-body 17b to be larger than the upper package half-body 17a.
FIG. 2 shows the process for molding the resin package body 17 of the device of FIGS. 1A and 1B.
Referring to FIG. 2, the lead frame 12 carrying thereon the semiconductor chip 14 in correspondence to the stage 13 defined thereon, is mounted, after interconnecting the chip 14 and the inner leads 15 by the bonding wires 16, on a lower mold 19b, such that the stage 13 as well as the semiconductor chip 14 and the bonding wires 16 are accommodated in a mold cavity 20 which is formed between the lower mold 19b and an upper mold 19a. Thereby, the upper mold 19a is formed with a depression that forms the upper half of the mold cavity such that the depression of the upper mold 19a is substantially larger, in terms of the area when viewed from the upward direction in FIG. 2, as compared with a corresponding depression formed on the lower mold 19b. It should be noted that the lower mold 19b carries a projection 21 for engagement with a corresponding depression formed on the upper mold 19a for achieving a proper alignment between the upper mold 19a and the lower mold 19b. By injecting a resin into the cavity 20 from a gate 22 formed on the upper mold 19a, the molding of the resin package body 17 is achieved.
In the molding process of FIG. 2, it should be noted that, because of the different sizes of the depressions provided on the upper and lower molds 19a and 19b, there may occur a case in which the lower part of the cavity 20 is filled completely by the resin before the upper part is filled by the resin. When this occurs, the inner leads 15 may be displaced in the upward direction as a result of the flow of the resin for equilibrating the pressure inside the cavity 20. As a result, the contact region 18a shown in FIG. 1B may be covered by a burr projecting laterally from the resin package body 17. Such a burr is difficult to remove even by a honing process and decreases the yield of the device.